Abstract

Anew and accurate modeling has been performed for an integrated Schottky barrier diode fabricated by 0.18um standard CMOS process. The bulk and distributed effects are considered by adding macro elements to an original SPICE diode model. The resistance and capacitance model parameters have been obtained precisely by a direct extraction method using S-parametersets with various bias points.Thevalidityof this new model andparameter extraction method has been verified by comparing with the measured S-parameters over the wide range of bias up to 10 GHz.