Modified Kogge-Stone VLSI adder architecture for GaAs technology

Beaumont-Smith, Andrew ; Burgess, Neil (1996) Modified Kogge-Stone VLSI adder architecture for GaAs technology. In: Gallium Arsenide Applications Symposium. GAAS 1996, 5-6 June 1996, Paris, France.

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Abstract

This paper describes a new VLSI adder architecture well-suited to digital GaAs VLSI technology. The architecture uses a relatively small amount of transistors while achieving very high speed. Simulation results indicate that in a 0.6um E/D MESFET GaAs VLSI technology, a 32-bit addition would take less than 1ns with a power consumption of 280mW.

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