Abstract

Parasitic elements involuntarily introduced during the layout design play an important role in integrated circuits operating at very high frequency. Very often, in fact, the electrical performances of microwave networks strongly depend on the dimensions of parasitic elements, such as interconnection lines and net discontinuities. In this paper a new "constraint generation" CAD tool is presented. This program enables a quantitative analysis of the influence of parasitic dimensions on the final circuit performances and the singling out of most critical interconnections.