Design Data for Hot-via Interconnects in Chip Scale Packaged MMICs up to 110 GHz

Bessemoulin, A. (2005) Design Data for Hot-via Interconnects in Chip Scale Packaged MMICs up to 110 GHz. In: Gallium Arsenide applications symposium. GAAS 2004, 11—12 Ottobre, 2004, Amsterdam.
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Abstract

Theoretical and experimental design data for the modeling of bump- to hot-via interconnect transitions, for use in chip-scale package MMICs, is presented. The theoretical data is based on cascaded analytical transmission line models, derived from rigorous electromagnetic analysis. Excellent agreement has been observed between theory and experiment up to 110 GHz. This modeling approach is validated with the characterization of a broadband millimeter-wave PHEMT amplifier MMIC using the hot-via and bump interconnects, for mounting on a carrier substrate; the measurements are as well, in very good concordance with the predicted performance, including the effects of BCB coating, backside metallization and bump- to hot-via transitions.

Abstract
Document type
Conference or Workshop Item (Paper)
Creators
CreatorsAffiliationORCID
Bessemoulin, A.
Subjects
DOI
Deposit date
21 Oct 2005
Last modified
16 May 2011 11:38
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