A constraint generation tool for the design of high frequency integrated circuits

Pillan, Margherita ; Salice, Fabio ; Ghione, Giovanni (1996) A constraint generation tool for the design of high frequency integrated circuits. In: Gallium Arsenide Applications Symposium. GAAS 1996, 5-6 June 1996, Paris, France.
Full text available as:
[thumbnail of GAAS_96_082.pdf]
Preview
PDF
Download (1MB) | Preview

Abstract

Parasitic elements involuntarily introduced during the layout design play an important role in integrated circuits operating at very high frequency. Very often, in fact, the electrical performances of microwave networks strongly depend on the dimensions of parasitic elements, such as interconnection lines and net discontinuities. In this paper a new "constraint generation" CAD tool is presented. This program enables a quantitative analysis of the influence of parasitic dimensions on the final circuit performances and the singling out of most critical interconnections.

Abstract
Document type
Conference or Workshop Item (Paper)
Creators
CreatorsAffiliationORCID
Pillan, Margherita
Salice, Fabio
Ghione, Giovanni
Subjects
DOI
Deposit date
16 Feb 2006
Last modified
17 Feb 2016 14:40
URI

Other metadata

Downloads

Downloads

Staff only: View the document

^