Abstract

This paper describes a low-power high speed flip-flop in Gallium Arsenide (GaAs) called PCLF for Pseudo-Complementary Logic Flip-Flop. The PCLF offers attractive power saving without performance degradation and is fully compatible with existing FET logic families. It can be efficiently used in the VLSI ICs, as well as in multigabit/second SSI or MSI ICs. As an example a D-flip-flop, T-flip-flop and a 1/8 divider have been designed and fabricated, verifying the expected low power dissipation.