Abstract

A GaAs monolithic clock and data recovery circuit for 2.5 Gb/s NRZ data stream has been designed and fabricated by using 0.3 mm HEMT technology from IAF FhG foundry. The main functions carried out by the IC are: signal amplification (25 dB), clock recovery and decision. The design is intended to achieve a complete 2.5 Gb/s receiver by using the IC and a LN preamplifier (transimpedance stage and limiting amplifier stage) placed in a DIL package. The overall scheme comprises about 200 active devices, used both for analog and digital blocks, uses a single rail bias (-4.5 V) and standard ECL output levels. The fabricated chip has been tested and measured by using a ceramic package and a small PCB, showing an input sensitivity of 30 mVpp and rms output jitter below 10 psec under 215-1 PRBS.