Abstract

A 2 GHz programmable-gain amplifier (PGA) using 0.12-µm CMOS technology is presented in this paper, which has a 51 dB gain control range with 3 dB gain control steps. The maximum output power of this PGA achieves 9 dBm while the 1-dB compression point is located at 8 dBm. A high linearity denoted by the oIP3 of 22 dBm at the maximum gain has been achieved. A new configuration to digitally implement a dB-linear gain characteristic is demonstrated in this paper, which simultaneously enables an adaptive power consumption.