Abstract

This paper provides a new approach to evaluate the transistor safe operating area at nominal operating conditions which has been demonstrated on MESFET technology. It consists on performing on-state and off-state accelerated DC step stresses for bias conditions which can be reached by the Vds and Vgs sweeps in overdrive conditions. Both on-state and off-state stresses shown different degradation modes which can be attributed to the different stress bias conditions. On the one hand, the on-state stress corresponds to the impact ionization regime where the drain-gate voltage is considered as an accelerating factor for the device degradation. On the other hand, the off-state stress is performed for bias conditions which correspond to the gate leakage current regime in the reverse Igs-Vgs characteristics where the drain-gate voltage and the gate current are considered as an accelerating factor for the device degradation.