Abstract

A nonlinear, dynamic empirical model, based on a Volterra-like approach, was previously proposed by the authors for the time-oriented characterization of sample/hold (S/H) and analog-to-digital conversion (ADC) devices. In this paper, the experimental procedure for model parameter measurement is presented, as well as techniques devoted to the implementation of the model in the framework of the main commercial CAD tools for circuit analysis and design. Examples of simulations, performed both in the time and frequency domain on the model obtained for a commercial device, are proposed, which show the model's capability of pointing out the dynamic nonlinear effects in the S/H-ADC response.