Shinohara, K. ; Yamashita, Y. ; Hikosaka, K. ; Hirose, N. ; Kiyokawa, M. ; Matsui, T. ; Mimura, T. ; Hiyamizu, S.
(2000)
Ultra-short T-shaped gate fabrication technique for InP based HEMTs with high ft (> 300 GHz) and their MMIC applications.
In: Gallium Arsenide applications symposium. GAAS 2000, 2-6 october 2000, Paris.
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Abstract
A fabrication technique for sub-50-nm T-shaped-gate InGaAs/InAlAs high electron mobility transistors (HEMTs) lattice-matched to InP substrates and their device characteristics are presented. A 35-nm T-shaped-gate HEMT is successfully fabricated by optimizing conditions of electron beam (EB) lithography and reactive ion etching (RIE) to make an ultra-fine resist pattern and precisely replicate it on a SiO2 film, which defines gate length (Lg). The device exhibits an excellent current-gain cutoff frequency (fT) as high as 317 GHz with high controllability. This technique is considered to be very effective for device and MMIC applications in the V band and even higher frequency ranges.
Abstract
A fabrication technique for sub-50-nm T-shaped-gate InGaAs/InAlAs high electron mobility transistors (HEMTs) lattice-matched to InP substrates and their device characteristics are presented. A 35-nm T-shaped-gate HEMT is successfully fabricated by optimizing conditions of electron beam (EB) lithography and reactive ion etching (RIE) to make an ultra-fine resist pattern and precisely replicate it on a SiO2 film, which defines gate length (Lg). The device exhibits an excellent current-gain cutoff frequency (fT) as high as 317 GHz with high controllability. This technique is considered to be very effective for device and MMIC applications in the V band and even higher frequency ranges.
Document type
Conference or Workshop Item
(Paper)
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Subjects
DOI
Deposit date
17 Jun 2004
Last modified
17 Feb 2016 13:40
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Document type
Conference or Workshop Item
(Paper)
Creators
Subjects
DOI
Deposit date
17 Jun 2004
Last modified
17 Feb 2016 13:40
URI
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