Abstract

The design of radio-frequency (RF) integrated circuits (ICs) in deep-submicron CMOS processes requires accurate and scalable compact models of the MOS transistor that are valid in the GHz frequency range and beyond. Unfortunately, the currently available compact models give inaccurate results if they are not modified adequately. This paper presents the basis of the modeling of the MOS transistor for circuit simulation at RF. A physical and scalable equivalent circuit that can easily be implemented as a Spice subcircuit is described. The small-signal and noise models are discussed and mea-surements made on a 0.25µm CMOS process are presented that validate the RF MOST model up to 10GHz.