Abstract

A method is presented for the investigation of non-thermal generated defect mechanisms with semiconductor devices. This method bases on applying Transmission Line Pulses (TLP) to the device to generate lifetime limiting defects. The pulse length is chosen down to 20 ns. This is short compared to the thermal time constant of the respective devices providing the generation of non-thermal defect mechanisms. Significantly higher current densities are used incomparison with normal operation to shorten the time of electrical defect generation. Current and voltage of theimpulse response, subsequent DC I/V and noise measurements are used to characterize the occurring defectmechanisms. Pulsed electrical stress techniques are proposed for different III/V semiconductor devices (e.g. TLM-structures,HBT) and results obtained with this method are presented.