Decoding and decision circuits for high speed multi-level transmission

Andre, Ph. ; Meghelli, M. ; Desrousseaux, P. ; Konczykowska, A. ; Godin, J. (1997) Decoding and decision circuits for high speed multi-level transmission. In: Gallium Arsenide Applications Symposium. GAAS 1997, 3-5 September 1997, Bologna, Italy.
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Abstract

High speed decoding and decision ICs for 4-level ETDM fibre optic transmission systems are presented. The circuits were fabricated in a InP/lnGaAs HBT technology with Ft = 53 GHz and Fmax = 40 GHz. A 4-level decoding circuit using a mux core architecture and a binary decision circuit were designed and measured. The potential performance of the decoder were experimentally assessed up to 16 GBaud (32 Gbit/s) (input data). The decision circuit is a D MSFF which was tested up to 22 Gbit/s.

Abstract
Document type
Conference or Workshop Item (Paper)
Creators
CreatorsAffiliationORCID
Andre, Ph.
Meghelli, M.
Desrousseaux, P.
Konczykowska, A.
Godin, J.
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DOI
Deposit date
23 Nov 2005
Last modified
17 Feb 2016 14:22
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