System-level simulation of a noisy phase-locked loop

Herzel, Frank ; Piz, Maxim (2005) System-level simulation of a noisy phase-locked loop. In: Gallium Arsenide applications symposium. GAAS 2005, 3-7 ottobre 2005, Parigi.
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Abstract

This paper presents a compact model of a noisy phase-locked loop (PLL) for inclusion in a time-domain system simulation. The phase noise of the reference is modeled as a Wiener process, and the phase noise contribution of the voltage-controlled oscillator (VCO) is described as an Ornstein-Uhlenbeck process. The model is applied to phase error modeling for a 60 GHz OFDM system including correction of the common phase error. A close agreement is observed between the time-domain simulation and a frequency-domain model.

Abstract
Document type
Conference or Workshop Item (Paper)
Creators
CreatorsAffiliationORCID
Herzel, Frank
Piz, Maxim
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DOI
Deposit date
15 Feb 2006
Last modified
17 Feb 2016 14:23
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