Low Power Single-Ended Active Frequency Doubler for a 60 GHz-Band Application

Masuda, Toru ; Landen, Lars ; Zirath, Herbert (2002) Low Power Single-Ended Active Frequency Doubler for a 60 GHz-Band Application. In: Gallium Arsenide applications symposium. GAAS 2002, 23-27 september 2002, Milano.
Full text available as:
[thumbnail of GaAs_3F_Masuda.pdf]
Preview
PDF
Download (333kB) | Preview

Abstract

The design and characterization of a 28-56 GHz frequency doubler based on a commercial foundry GaAs pHEMT process is described. To realize low power consumption and high conversion gain with small input power at the same time, we employed a simple circuit topology composed of a single-ended active frequency doubler and a frequency selective buffer amplifier. The doubler chip occupies 2 mm 2 chip area and delivers 4 dBm with an input power of 0 dBm. The excellent unwanted harmonics suppression of 29 dB and low power operation of 40 mW were obtained.

Abstract
Document type
Conference or Workshop Item (Paper)
Creators
CreatorsAffiliationORCID
Masuda, Toru
Landen, Lars
Zirath, Herbert
Subjects
DOI
Deposit date
17 Jun 2004
Last modified
17 Feb 2016 13:37
URI

Other metadata

Downloads

Downloads

Staff only: View the document

^