Gate lag in InP HFET : influence on digital circuits

Gautier-Levine, A. ; Scavennec, A. ; Lefevre, R. ; Falcou, A. ; Dumas, J.M (1998) Gate lag in InP HFET : influence on digital circuits. In: Gallium Arsenide Applications Symposium. GAAS 1998, 5-6 October 1998, Amsterdam, The Netherlands.
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Abstract

The GaAs MESFET is widely used in high speed digital transmission. But the frequency dispersion of both transconductance and output conductance, mainly due to traps, often penalizes the use of these devices in circuit applications (1). In the time domain these parasitic effects lead to a distorsion of the transmitted pulse and to the shift of the logic levels. GaAs P-HEMTs are known to exhibit less distorsion and gate lag effects. InP HFETs are also susceptible to drain/gate lag effects (2). We report on comparative measurements on GaAs MESFET, GaAs P-HEMT and InP HFET in order to gain a better understanding of the role of traps in InP HFETs.

Abstract
Tipologia del documento
Documento relativo ad un convegno o altro evento (Atto)
Autori
AutoreAffiliazioneORCID
Gautier-Levine, A.
Scavennec, A.
Lefevre, R.
Falcou, A.
Dumas, J.M
Settori scientifico-disciplinari
DOI
Data di deposito
16 Feb 2006
Ultima modifica
17 Feb 2016 14:34
URI

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