Delay, power and area expressions for GaAs DCFL circuits and their applications to optimization

Gomez, L. ; Hernandez, A. ; Nunez, A. (1994) Delay, power and area expressions for GaAs DCFL circuits and their applications to optimization. In: Gallium Arsenide Applications Symposium. GAAS 1994, 28-30 April 1994, Turin, Italy.
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Abstract

This work addresses the problem of analytical multiobjective optimization of combinational DCFL/SDCFL GaAs MESFETs IC. The critical path is determined by means of the GASTIM timing analyzer. The optimization strategy takes into account the slope dependency, the fan-out and the wiring capacitances. The results show that is possible to decrease the power consumption without degrading the propagation delay. We are not aware of any automatic tool able to solve the optimization task when designing circuits on GaAs material.

Abstract
Document type
Conference or Workshop Item (Paper)
Creators
CreatorsAffiliationORCID
Gomez, L.
Hernandez, A.
Nunez, A.
Subjects
DOI
Deposit date
17 Feb 2006
Last modified
17 Feb 2016 14:42
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