Abstract

Si-MMIC's become the key components to realize low cost single chip RF sections for mobile communication terminals. To realize on-chip matching Si-MMIC's, there is a problem of high-loss on-chip passive components due to the dielectric loss of Si substrates. In the conventional Si-IC process used for analog/digital IC production, low resisivity Si substrates have been used, and it is difficult to change to high resistivity Si substrates. Based on electro-magnetic simulation, the loss reduction effect by using coplanar waveguide (CPW) structure is analyzed for low resistivity Si substrates. The measured results of transmission lines and on-chip spiral inductors show the superiority of CPW over microstrip line (MS).