A new FET extrinsic parameter extraction method at pinch-off bias utilizing gate-width scaling property

Kim, Dae-Hyun ; Yang, Sung-Gi ; Ryu, Gi-Hyon ; Seo, Kwang-Seok (1998) A new FET extrinsic parameter extraction method at pinch-off bias utilizing gate-width scaling property. In: Gallium Arsenide Applications Symposium. GAAS 1998, 5-6 October 1998, Amsterdam, The Netherlands.
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Abstract

A new FET extrinsic parameter extraction method is proposed, in which all the extrinsic elements can be determined directly from the S-parameters at pinch-off bias. It utilizes the measurement data of various gate-width FET's and the simple scaling property of each equivalent circuit parameters, eliminating some complex measurement steps such as forward gate bias measurement. Since the gate-width scaling characteristics are taken into account, the proposed method can be utilized for the MMIC design where the optimization of the FET gate-width is important. The proposed method was successfully applied to the modeling of 0.25 um GaAs P-HEMT.

Abstract
Tipologia del documento
Documento relativo ad un convegno o altro evento (Atto)
Autori
AutoreAffiliazioneORCID
Kim, Dae-Hyun
Yang, Sung-Gi
Ryu, Gi-Hyon
Seo, Kwang-Seok
Settori scientifico-disciplinari
DOI
Data di deposito
16 Feb 2006
Ultima modifica
17 Feb 2016 14:34
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