A GaAsSb/InP HBT circuit technology

Godin, J. ; Riet, M. ; Konczykowska, A. ; Berdaguer, P. ; Kahn, M. ; Bove, P. ; Lahreche, H. ; Langer, R. ; Lijadi, M. ; Pardo, F. ; Bardou, N. ; Pelouard, J-L. ; Maneux, C. ; Belhaj, M. ; Grandchamp, B. ; Labat, N. ; Touboul, A. ; Bru-Chevallier, C. ; Chouaib, H. ; Benyattou, T. (2005) A GaAsSb/InP HBT circuit technology. In: Gallium Arsenide applications symposium. GAAS 2005, 3-7 ottobre 2005, Parigi.

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Abstract

A InP/GaAsSb/InP double-heterojunction bipolar transistor (DHBT) structure has been defined, realized by MBE epitaxy, and optimized, thanks to simulation based on in-depth physical characterizations. A circuit-oriented technology has been developed, which has been validated by the design and fabrication of a full-rate (40 GHz clock) 40 Gbit/s D-FF.

Abstract

Tipologia del documento

Documento relativo ad un convegno o altro evento (Atto)

Autori

Autore	Affiliazione	ORCID
Godin, J.
Riet, M.
Konczykowska, A.
Berdaguer, P.
Kahn, M.
Bove, P.
Lahreche, H.
Langer, R.
Lijadi, M.
Pardo, F.
Bardou, N.
Pelouard, J-L.
Maneux, C.
Belhaj, M.
Grandchamp, B.
Labat, N.
Touboul, A.
Bru-Chevallier, C.
Chouaib, H.
Benyattou, T.